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A 1.41-pJ/b 224-Gb/s PAM4 6-bit ADC-Based SerDes Receiver With Hybrid AFE Capable of Supporting Long Reach Channels

A 224-Gb/s pulse amplitude modulation 4-level (PAM4) ADC-based SerDes receiver (RX) is implemented in a 5-nm FinFET process. The RX consists of a low-noise hybrid analog front-end (AFE) that incorporates… Click to show full abstract

A 224-Gb/s pulse amplitude modulation 4-level (PAM4) ADC-based SerDes receiver (RX) is implemented in a 5-nm FinFET process. The RX consists of a low-noise hybrid analog front-end (AFE) that incorporates both inductive peaking and source degeneration, a 64-way time-interleaved ADC, digital equalization consisting of an up to 30 tap feed-forward equalizer (FFE), optional decision-feedback equalizer (DFE), and a clock-data-recovery (CDR) loop utilizing a 14-GHz digitally controlled oscillator (DCO). The RX was characterized for medium-to-long reach channels (20.6-, 27-, 31.4-, and 38-dB insertion loss at Nyquist) with a corresponding pre-forward error correction (FEC) bit error rates of 1.9E-11, 5.2E-10, 1.2E-8, and 6E-7, respectively. The analog power consumption of the RX is 1.41 pJ/b.

Keywords: based serdes; serdes receiver; reach channels; long reach; adc based

Journal Title: IEEE Journal of Solid-State Circuits
Year Published: 2023

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