LAUSR

Transistors incorporating phase change materials (Phase Change FETs) are being investigated to obtain steep switching and a boost in the $I_{\mathrm{ON}}/I_{\mathrm{OFF}}$ ratio and, thus, to solve power and energy limitations of CMOS technologies. In addition to the replacement of the transistors in conventional static CMOS logic circuits, the distinguishing features of Phase Change FETs can be exploited in other application domains or can be useful for solving specific design challenges. In this letter, we take advantage of them to implement a smart dynamic gate in which undesirable contention currents are reduced, leading to speed advantage without power penalties.