The reliability of gate dielectrics is one of the key issues in SiC Trench MOSFET. While reducing the gate oxide electric field in OFF state through dedicated shielding structures by… Click to show full abstract
The reliability of gate dielectrics is one of the key issues in SiC Trench MOSFET. While reducing the gate oxide electric field in OFF state through dedicated shielding structures by various designs, JFET resistances are often introduced. In this letter, a new asymmetric cell structure, tilt implanted 4H-SiC trench MOSFET (ACTI-TMOS) is proposed. This approach achieves a better trade-off between gate oxide electric field and specific ON-resistance (
               
Click one of the above tabs to view related content.