LAUSR

This work experimentally demonstrates the memory operations of a $\text{Z}^{{2}}$ -FET (Zero impact ionization, Zero subthreshold swing) matrix without the use of selectors. Selection and deselection of memory cells in the same bit line can be controlled by modulating the front-gate voltage to prevent the use of a dedicated selector. Appropriate drain voltages to achieve two logic states need to be chosen according to the memory window when the cells are selected. 2D TCAD simulations reveal that the ‘1’-state current of a deselected cell remains as low as that of the ‘0’-state since the deselection gate voltage induces higher potential barriers that block the carrier injections from the source and drain. The power consumption for writing and reading the ‘0’-state are nearly identical for cells with and without selectors. However, at fixed bit line current, the power consumption in any writing and reading is slightly higher with selectors due to their voltage drop.