LAUSR

Spintronic racetrack memory stores binary information in magnetic domains, isolated with domain walls and movable within a nanowire. Because the domain wall motion is probabilistic, Varshamov–Tenengolts (VT) codes have been applied to such devices due to their ability to correct single-bit deletion and insertion. The complexity of the VT encoder and decoder is largely because of a sequential syndrome calculator that employs modulo-additions. Previous implementations avoided this complexity by restricting the racetrack size to a specific number of magnetic domains. In this letter, we describe an efficient implementation of the syndrome calculator with a novel steering algorithm, which not only alleviates the above-mentioned restrictions but also reduces adder size and the required number of operations, exploiting modulo-arithmetic symmetries in VT codes. We synthesize the syndrome calculator with varying number of domains to show that the algorithm is scalable, increases areal efficiency, slashes processing time, and lowers the power consumption of a VT encoder and decoder.