LAUSR

In this letter, a 38–40 GHz high-speed IQ modulator using sub-harmonically injection-locked quadrature frequency-locked loop (FLL) is proposed. The IQ modulator consists of a quadrature FLL and four reflection-type modulators and it is implemented in a 90-nm complimentary metal–oxide–semiconductor (CMOS) process. With a sub-harmonic number of four, the proposed modulator features a locking range wider than 2 GHz, a maximum data rate of higher than 8 Gbps, and low error vector magnitudes (EVMs), among high-level QAM modulations. The modulation scheme can be up 128 QAM due to the low phase noise and low quadrature error of the FLL. The measured 128-QAM EVM is within 3%. With a data rate of 8 Gbps, the measured 16-QAM EVM is within 6%.