LAUSR

Cyclic Redundancy Check (CRC) or Cyclic Redundancy Code is a Cyclic Error Detection Code used to preserve the integrity of data in storage and transmission applications. CRC of a stream of message bits is usually calculated block-wise in parallel with the help of a Look-Up Table (LUT) in software or State Space transformation matrix in hardware. Presented here is a novel method and architecture of parallel computation of Cyclic Redundancy Codes without any Look-Up Table for an arbitrary generating polynomial which is programmable at runtime. The method reduces computational complexity and storage requirements by implicitly factorizing the transformation matrix needed to compute the remainder into two simpler Toeplitz matrices. The resulting hardware architecture is suitable for embedded applications.