Advances in semiconductor technology enable integrating tens of cores on a single chip. Providing quality-of-service (QoS) for communication flows in complex embedded applications is critical. In this paper, we present… Click to show full abstract
Advances in semiconductor technology enable integrating tens of cores on a single chip. Providing quality-of-service (QoS) for communication flows in complex embedded applications is critical. In this paper, we present a new approach for designing guaranteed service (GS) networks-on-chip by introducing a new arbitration algorithm and differentiating high and low priority traffic flows in best-effort (BE) networks. An analytical model is provided to compute accurate performance bound parameters in the network with the new arbitration. When the flows have the same priorities in a switch, the new algorithm acts exactly the same as the basic round robin arbitration. It works as a superset of the basic algorithm, when the flows have different priorities. The proposed method helps designers to easily equip traditional BE networks with effective hard QoS, changing it to a GS network. This is done without the need to get involved in the designing complexity of traditional GS networks and still benefit from the superior properties of BE networks. We show substantial improvement in performance bounds for high priority flows (more than 40% in delay and 80% in bandwidth, on average) compared to the known approaches.
               
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