LAUSR

Since integrating memory blocks on-chip became affordable, embedded logic analysis has been used extensively for post-silicon validation and debugging. Deciding at design time which signals to be traceable at the post-silicon phase, has been posed as an algorithmic problem a decade ago. The primary focus of the subsequent approaches on this topic was to restore as much data as possible within a software simulator in order to facilitate the analysis of functional bugs, assuming there are no electrically induced design errors, e.g., bit-flips. In this paper, we show that analyzing post-silicon traces can also aid with the identification bit-flips. We present a new trace signals selection algorithm that is driven by the detection of bit-flips.