Malicious manipulation of very large-scale integration physical-layout design is a serious problem in modern integrated circuit design. The physical-layout design database requires a highly compressed secured storage medium. In this… Click to show full abstract
Malicious manipulation of very large-scale integration physical-layout design is a serious problem in modern integrated circuit design. The physical-layout design database requires a highly compressed secured storage medium. In this article, we propose a secured compressive asymmetrical convolutional auto-encoder (ACAE) machine learning framework, CompressKey, which performs layout compression and encryption simultaneously. It utilizes geometric features to eliminate redundancies in layout patterns. We propose a “Divide and Merge” technique to partition each layer into smaller sizes of unique patterns to address the inconsistency of layout pattern complexity. We also propose “Matrix Expansion” and “Matrix Reduction” techniques on the matrix-based pattern to achieve secured “near lossless” compression on the layouts. We have evaluated CompressKey on 14/28/32 nm open-source ICCAD contest databases and achieved a secured compression ratio of 4.54 with encryption features outperforming
               
Click one of the above tabs to view related content.