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IEEE-CPMT Special Topic: Advances in Tools/Techniques for Microelectronic Package Failure Analysis

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Recent advances in microelectronic package technologies such as 2.5-D, 3-D, and wafer-level packaging have delivered rapid breakthroughs in the semiconductor industry by providing better device performance, power efficiency, and cost… Click to show full abstract

Recent advances in microelectronic package technologies such as 2.5-D, 3-D, and wafer-level packaging have delivered rapid breakthroughs in the semiconductor industry by providing better device performance, power efficiency, and cost reduction. Reduction of feature sizes for these technologies has also required advancements in tools and techniques necessary to observe and investigate failures seen in these complex devices. The complexity of these devices has challenged researchers to modify conventional tools and invent smart methods for enhanced fault isolation (FI) and failure analysis (FA) capabilities. This Special Topics Section is a collection of various fault isolation and failure analysis advances made by research groups active in this area. Dissemination of all this research in one Special Topics Issue will greatly benefit the researchers working in the area of failure analysis of semiconductor devices. We capture the highlights of this Special Topic below.

Keywords: microelectronic package; tools techniques; special topic; failure; failure analysis

Journal Title: IEEE Transactions on Components, Packaging and Manufacturing Technology
Year Published: 2018

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