Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few decades, driven in part by the techno-economic difficulties of dimensional scaling and the increasing interconnect delay in microelectronics.… Click to show full abstract
Three-dimensional integrated circuits (3-D IC) technology has emerged in the past few decades, driven in part by the techno-economic difficulties of dimensional scaling and the increasing interconnect delay in microelectronics. In a 3-D IC, vertical integration of multiple transistor planes, either through monolithic integration or through bonding of multiple strata, offers reduced interconnect delay and enhanced design flexibility. However, vertical integration in a 3-D IC also results in severe thermal management challenges. Thermal management of a 3-D IC is exacerbated by the multilayer nature of the 3-D IC. Furthermore, new components such as through-silicon vias (TSVs) offer opportunities for novel thermal management. This article presents a critical review of research literature related to heat transfer in 3-D ICs, focusing specifically on thermal modeling, thermal–electrical codesign, and thermal management of a 3-D IC. Key literature from recent years is categorized and summarized. A discussion on the future outlook for research in these areas is presented. It is expected that this review article will be helpful for researchers in academia and industry for understanding the state-of-the-art in various areas related to heat transfer in 3-D ICs.
               
Click one of the above tabs to view related content.