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A Compact High-Performance Programmable-Gain Analog Front End for HomePlug AV2 Communication in 0.18- $\mu \text{m}$ CMOS

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An analog front end suitable for powerline communication HomePlug AV2 is firstly presented. Targeting different input power level, an attenuation-programmable gain amplifier (AT-PGA) and a low- noise amplifier are adopted… Click to show full abstract

An analog front end suitable for powerline communication HomePlug AV2 is firstly presented. Targeting different input power level, an attenuation-programmable gain amplifier (AT-PGA) and a low- noise amplifier are adopted as the input stage of receiver, respectively, followed by a fourth-order low-pass filter and a PGA with a build-in feedback control to improve linearity and stay constant bandwidth. A line driver with programmability in transmitter is designed to synthesize output impedance for maximizing the power density transmission ratio in power lines characterized by an impedance of $50~\Omega $ . The analog front end is realized in 0.18- $\mu \text{m}$ 3.3-V CMOS technology with power consumption of 160 mW (receiver) and 350 mW (transmitter) that occupies a 5.75-mm $^{2}$ die area (dual channel). The receiver exhibits a bandwidth of 100 MHz and a gain range from −26.2 to 21 dB, with a minimum noise figure of 20.2 dB at maximum gain 21 dB and maximum IIP3 of 36.1 dBm at minimum gain −26.2 dB. The transmitter achieves 47-dB low-band multi-tone power ratios (MTPR) and 9.6-dB high-band MTPR.

Keywords: gain; analog front; front end; tex math; inline formula

Journal Title: IEEE Transactions on Circuits and Systems I: Regular Papers
Year Published: 2017

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