Shielding, which is used in VLSI designs to prevent noise interference from the cross-coupling capacitance between adjacent signals can also be used to tune the propagation delay of the clock… Click to show full abstract
Shielding, which is used in VLSI designs to prevent noise interference from the cross-coupling capacitance between adjacent signals can also be used to tune the propagation delay of the clock signals in designs operating at low GHz frequencies. This paper presents a detailed design for a 16-nm ring oscillator with built-in reconfigurable shielding, and a delay estimation methodology. Together these provide a post-silicon measurement methodology that can derive accurate shielding delays without any direct delay measurements. The shielded ring oscillator and the testing methodology are designed to minimize the effects of on-die variations on estimation accuracy. Comparisons of the estimated delays with SPICE simulations show very good fit across process technology corners. The circuit was fabricated in 16-nm technology. The accuracy and robustness of the estimation methodology were verified by cross-validation, obtained from both pre and post-silicon measurements.
               
Click one of the above tabs to view related content.