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A Study of BER and EVM Degradation in Digital Modulation Schemes Due to PLL Jitter and Communication-Link Noise

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A phase-locked-based frequency synthesizer – ubiquitously used to generate local oscillation in a communication transceiver – exhibits phase noise and jitter which considerably degrades bit-error rate (BER) and error vector… Click to show full abstract

A phase-locked-based frequency synthesizer – ubiquitously used to generate local oscillation in a communication transceiver – exhibits phase noise and jitter which considerably degrades bit-error rate (BER) and error vector magnitude (EVM) of a digital communication link. This paper presents an analytical study of EVM and BER degradation for a variety of widely used digital modulation schemes. Phase noise and jitter of a generic integer-N phase-locked loop (PLL) as a local oscillator feeding an RF mixer are derived, while accounting for the reference spurs and cyclo-stationarity of the mixer operation as well as the additive noise of the communication link. This jitter model is then utilized to directly study its impact on digital modulation constellations. Specifically, the EVM and BER degradation due to the PLL jitter in communication systems incorporating M-ary phase-shift keying (M-PSK) and ${4^{M}}$ quadrature amplitude modulation ( ${4^{M}}$ QAM) are analyzed. Comparison between analytical models and system-level simulations verifies an excellent accuracy of these models.

Keywords: communication link; communication; modulation; modulation schemes; degradation; digital modulation

Journal Title: IEEE Transactions on Circuits and Systems I: Regular Papers
Year Published: 2022

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