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A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers

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Phase locked loops for fractional frequency synthesis typically use Digital $\Delta \Sigma $ Modulators (DDSMs) as their divider controllers. Different types and configurations of DDSMs have been presented in the… Click to show full abstract

Phase locked loops for fractional frequency synthesis typically use Digital $\Delta \Sigma $ Modulators (DDSMs) as their divider controllers. Different types and configurations of DDSMs have been presented in the past which have distinctive characteristics in terms of spectral shaping of their quantization errors, spur immunity and implementation costs. This paper presents a family of DDSMs that have provably high spur immunity and low folded noise when used in fractional- ${N}$ frequency synthesizers with polynomial nonlinearities.

Keywords: fractional frequency; frequency; high spur; tex math; inline formula; spur immunity

Journal Title: IEEE Transactions on Circuits and Systems I: Regular Papers
Year Published: 2022

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