LAUSR

This paper presents a simple yet effective $G_{m}$ -boosting technique for improving gain and noise performance of millimeter-wave (mm-wave) low-noise amplifiers (LNAs) comprising triple-well transistors typically found in the modern bulk CMOS processes. The proposed technique uses a resistor that connects the p-well and deep n-well terminals of the triple-well transistor, leaving the terminals floating instead of conventionally connecting them to the ground and supply voltage. This arrangement exploits a leakage current through a diode formed between the drain/source and p-well of each transistor, thus autonomously setting its bulk potential for increased transconductance, while ensuring its robustness to the process variation. The improved isolation between the p-well and the substrate further improves the gain and noise performance. We provide a theoretical analysis of this floating resistor-based body biasing method and support it with simulation results. For experimental validation, a two-stage cascode LNA was designed and fabricated in 28-nm bulk CMOS. The measurement results show that 3.3–4dB noise figure (NF) and 19.1–16.1dB gain are achieved at 24.7–29.5GHz. To ensure a fair comparison, another identical LNA with the normally expected triple-well biasing was also fabricated. The proposed method reveals a 0.6dB improvement in minimum NF and an additional ~3.5dB gain without any significant linearity degradation.