LAUSR

This work proposes implementation friendly algorithm for multicoset sampling based wideband spectrum sensing that alleviates computational space and enables parallel execution, incurring lower latency. Based on this proposed algorithm, we provide a new hardware-efficient VLSI architecture of wideband spectrum sensor (WSSR), which offers short sensing time while sensing the wideband spectrum. Additionally, this paper presents a comprehensive discussion of all the submodule micro-architectures of the proposed WSSR. Subsequently, extensive performance analyses performed in the AWGN channel environment have demonstrated that our WSSR delivers adequate detection probability of 0.9 at -5 dB of SNR. Furthermore, the proposed WSSR design also uses a Zynq UltraScale+ FPGA board with a $14.16~\mu \text{s}$ sensing time and a 2.63 GHz maximum sensing bandwidth. Comparison of our hardware implementation results has shown that the proposed WSSR achieves 38.5% higher sensing bandwidth and 90% shorter sensing time, in comparison to the state-of-the-art work. Eventually, this paper concludes by showing the ASIC synthesis and post-layout simulation results of the proposed WSSR in 90 nm-CMOS technology, which senses $5.4\times $ wider bandwidth than the state-of-the-art implementation.