LAUSR

Branch prediction structures are increasingly used in space processors due to their crucial role in improving processor performance. Due to radiation effects such as Single Event Upset (SEU) causing system failures, it is necessary to provide protection techniques for branch prediction modules against complex spatial environments. In this paper, we proposed a simple, efficient, low-power, and fault-tolerant design scheme for L0 BTB consisting of a master-slave and a check-decision module. The strategy sets up the L0 BTB structure as a master-slave structure and adds an error check to detect single-bit errors. Experimental results show that we achieve 100% fault tolerance without a loss hit rate. The increase in resource usage is 1.1x, and the path delay increases by 8.1%, superior to other methods. The L0 BTB is a fully-associative structure and multiple entries are accessed simultaneously, which introduces significant power consumption. We added a low-power design for the master-slave module to reduce the query power consumption by 65.9%. In addition, we also applied the scheme to the RAS module. The experimental results demonstrate that our approach is an efficient, generic, fault-tolerant design scheme that can be deployed to different register files.