This brief presents a fully CMOS voltage reference based on a self-biased topology, which provides low current consumption while saving silicon area. Temperature compensation is achieved by means of a… Click to show full abstract
This brief presents a fully CMOS voltage reference based on a self-biased topology, which provides low current consumption while saving silicon area. Temperature compensation is achieved by means of a subthreshold triode-based Widlar current reference and a proper arrangement of an active load. The proposed voltage reference was fabricated in a standard 0.13-
               
Click one of the above tabs to view related content.