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Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area

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In this brief an improved Dickson charge pump (DCP) topology exploiting a clock boosting is presented. An accurate while simple theoretical model for the dynamic behavior of the charge pump… Click to show full abstract

In this brief an improved Dickson charge pump (DCP) topology exploiting a clock boosting is presented. An accurate while simple theoretical model for the dynamic behavior of the charge pump is carried out. Analytical comparison with the traditional DCP reveals that the proposed solution can achieve a rise time or area reduction between 10% and 60% at the cost of a slight circuit complexity. Finally, simulation results using a 65-nm CMOS technology show the accuracy of the analytical model as well as the advantages of the proposed solution.

Keywords: charge; clock; rise time; charge pump

Journal Title: IEEE Transactions on Circuits and Systems II: Express Briefs
Year Published: 2019

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