LAUSR

Neural Network models most often exploit the SoftMax function in the classification stage for computing probabilities through exponentiation and division operations. To reduce the complexity and the energy consumption of such stage, several hardware-friendly approximation strategies have been disclosed in the recent past. This brief evaluates the effects of an aggressive approximation of the SoftMax layer on both classification accuracy and hardware characteristics. Experimental results demonstrate that the proposed circuit, when implemented in a 28 nm FDSOI technology, saves ~65% of silicon area with respect to competitors, dissipating less than 1 pJ. FPGA implementation results confirm a massive energy dissipation reduction with respect to the conventional baseline architecture, without introducing penalties in the Top-1 accuracy.