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A Scalable Model for Snapback Characteristics of Circuit-Level ESD Simulation

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It is challenging to simulate the snapback behaviors under electrostatic discharge (ESD) stresses due to the limitation of simulation program with integrated circuit emphasis (SPICE) simulation tools. In this brief,… Click to show full abstract

It is challenging to simulate the snapback behaviors under electrostatic discharge (ESD) stresses due to the limitation of simulation program with integrated circuit emphasis (SPICE) simulation tools. In this brief, a new model is proposed to investigate the avalanche breakdown effect using the voltage-controlled current source (VCCS), which greatly facilitates the calculation of the avalanche multiplication factor ${M}$ and improves the convergence characteristics. In particular, this new method transfers the exponential relationship of ${M}$ into the linear relationship of the VCCS gain. The versatility of the model is validated by its operations in various ESD protection circuits with MOS as the discharge device, while the scalability is demonstrated by its applications in varied device sizes.

Keywords: esd; tex math; inline formula; model; simulation; snapback

Journal Title: IEEE Transactions on Circuits and Systems II: Express Briefs
Year Published: 2022

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