The benefits of technology scaling have fueled interest in voltage-time domain hybrid ADCs. The hybrid ADCs employing combinations of successive approximation register (SAR), time-to-digital converter (TDC), and voltage-controlled oscillator (VCO)… Click to show full abstract
The benefits of technology scaling have fueled interest in voltage-time domain hybrid ADCs. The hybrid ADCs employing combinations of successive approximation register (SAR), time-to-digital converter (TDC), and voltage-controlled oscillator (VCO) architectures have become attractive alternatives for analog intensive ADCs, owning to the merits of digital-centric nature, low-voltage tolerance, and scaling-friendly circuits. This tutorial brief aims to summarize on the advancement of voltage-time domain hybrid ADCs. The scope of this brief includes the basics and motivations behind the hybrid ADCs, followed by the survey covering the performance breakthroughs of hybrid ADC in terms of low power, high speed, and high resolution, and discuss the contributions and drawbacks of these techniques and architectures. The future trends are derived finally.
               
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