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This brief proposes a novel sub-1V discrete-time CMOS bandgap reference circuit where a constant voltage is produced by summation of a CTAT and a PTAT voltage that are sampled onto… Click to show full abstract
This brief proposes a novel sub-1V discrete-time CMOS bandgap reference circuit where a constant voltage is produced by summation of a CTAT and a PTAT voltage that are sampled onto a capacitor. By sampling the voltages onto a capacitor, we eliminate the need for an opamp in the bandgap core, which tends to be the dominant source of noise and offset concerns in low voltage bandgap designs in scaled technologies. A prototype was designed and fabricated in 28nm TSMC HPC+ technology with a nominal output voltage of 108mV. It demonstrates a temperature coefficient of 8.5ppm/°C between −40°C and 125°C, and occupies an area of 0.0075mm2 while consuming $11.6\mu \text{W}$ of power.
Journal Title: IEEE Transactions on Circuits and Systems II: Express Briefs
Year Published: 2022
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