LAUSR

In this brief, we present CIMulator, an open-source, extensible modeling, simulation, and emulation framework for on-chip digital Computing-In-Memory (CIM) design and assessment. Featuring a synthesizable Register Transfer Level (RTL) model, CIMulator encapsulates the fundamental in-memory bitline logic and the near-memory compute functionalities altogether. In this way, CIMulator ensures cycle-accurate RTL simulation, as well as system-level processor/CIM integration and emulation on COTS (commercially off-the-shelf) FPGA devices with an end-to-end correctness guarantee. In addition, we adopt a CIM intrinsics programming approach and an instruction-level energy model to estimate the application program execution energy. We implement an illustrative CIM system design emulated on a Cyclone-IV FPGA device and assess the functionality and performances of several applications, demonstrating the effectiveness of the proposed methodology. The source code is available at https://github.com/adervay1/CIMulator.