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An In-Circuit Test Method for Measuring the Bonding Resistances of Individual IC Pins From an Interconnected Multiple IC Assembly of Flexible Hybrid Electronics

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An in-circuit test method for extracting the series parasitic resistance associated with the bonding material used to attach IC chips to Flexible Hybrid Electronic assemblies is presented. The method exploits… Click to show full abstract

An in-circuit test method for extracting the series parasitic resistance associated with the bonding material used to attach IC chips to Flexible Hybrid Electronic assemblies is presented. The method exploits the on-chip electro-static-discharge (ESD) protection circuits of commercial ICs during the measurement and utilizes analog guarding for isolating the measurement path. This approach obviates the need for accessing the terminals of the IC, as these are difficult to access in a Flexible Hybrid Electronic Assembly. Experiments with proposed approach reveals resistance measurement from 10 m $\Omega $ to $300~\Omega $ within 10 kHz bandwidth with less than 5% error, while lower limit of the resistance across the applied analog guard is ~20 $\text{m}\Omega $ . The proposed method is applied to a multi-IC assembly of Flexible Hybrid Electronics subjected to cyclic bending and the experimental results are presented.

Keywords: method; tex math; inline formula; assembly; flexible hybrid

Journal Title: IEEE Transactions on Circuits and Systems II: Express Briefs
Year Published: 2023

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