An in-circuit test method for extracting the series parasitic resistance associated with the bonding material used to attach IC chips to Flexible Hybrid Electronic assemblies is presented. The method exploits… Click to show full abstract
An in-circuit test method for extracting the series parasitic resistance associated with the bonding material used to attach IC chips to Flexible Hybrid Electronic assemblies is presented. The method exploits the on-chip electro-static-discharge (ESD) protection circuits of commercial ICs during the measurement and utilizes analog guarding for isolating the measurement path. This approach obviates the need for accessing the terminals of the IC, as these are difficult to access in a Flexible Hybrid Electronic Assembly. Experiments with proposed approach reveals resistance measurement from 10 m
               
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