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Homogeneity Enforced Calibration of Stage Nonidealities for Pipelined ADCs

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Pipelined analog-to-digital converters (ADCs) are fundamental components of various signal processing systems requiring high sampling rates and a high linearity. Over the past years, calibration techniques have been intensively investigated… Click to show full abstract

Pipelined analog-to-digital converters (ADCs) are fundamental components of various signal processing systems requiring high sampling rates and a high linearity. Over the past years, calibration techniques have been intensively investigated to increase the linearity. In this brief, we propose an equalization-based calibration technique which does not require knowledge of the ADC input signal for calibration. For that, a test signal and a scaled version of it are fed into the ADC sequentially, while only the corresponding output samples are used for calibration. Several test signal sources are possible, such as a signal generator (SG) or the system application (SA) itself. For the latter case, the presented method corresponds to a background calibration technique. Thus, slowly changing errors are tracked and calibrated continuously. Because of the low computational complexity of the calibration technique, it is suitable for an on-chip implementation. Ultimately, this brief contains an analysis of the stability and convergence behavior as well as simulation results.

Keywords: calibration technique; calibration stage; calibration; homogeneity enforced; enforced calibration; stage nonidealities

Journal Title: IEEE Transactions on Circuits and Systems II: Express Briefs
Year Published: 2022

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