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An analytical model for the power vertical MOS device with a high-k insulating dielectric (HKMOS) is derived via the superposition methodology on the condition of punchthrough. Considering three portions—the superjunction… Click to show full abstract
An analytical model for the power vertical MOS device with a high-k insulating dielectric (HKMOS) is derived via the superposition methodology on the condition of punchthrough. Considering three portions—the superjunction part, the p-i-n diode, and the interface charges at the heterointerface based on the conservation of electric displacement, the HKMOS device could be modeled well as verified by the 2-D simulation results.
Keywords:
power vertical;
superposition methodology;
methodology;
mos device;
via superposition;
device
Journal Title: IEEE Transactions on Electron Devices
Year Published: 2018
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Journal Title: IEEE Transactions on Electron Devices
Year Published: 2018
Link to full text (if available)
Share on Social Media: Sign Up to like & get
recommendations!