LAUSR

A novel split triple-gate (STG) LDMOS is proposed to improve static-state and switching performances. The proposed structure features a triple-gate and split gates (SGs). The triple-gate consists of planar part and trench part, and the SGs are embedded into the drift region and isolated with slanted oxide. The triple-gate enlarges the channel width. Furthermore, the trench part of triple-gate and trench drain–source contributes to a uniform on-state current density distribution from the surface to the bottom of the drift region, resulting in a high average current density. Consequently, the specific ON-resistance ( ${R}_{ \mathrm{\scriptscriptstyle ON},\textsf {sp}}$ ) and the transconductance are improved. In the off-state, the SGs act as a slanted field plate to not only modulate the electric field distribution, but also assist in depleting the drift region to increase the optimal doping concentration, which further decreases the ${R}_{ \mathrm{\scriptscriptstyle ON},\textsf {sp}}$ and maintains a high BV. Moreover, the SG is introduced to reduce the gate–drain capacitance and switching power dissipation. Compared with the triple-gate LDMOS (TG LDMOS), the STG LDMOS not only reduces the ${R}_{ \mathrm{\scriptscriptstyle ON},\textsf {sp}}$ by 66%, but also decreases the gate–drain charge by 41%.