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Breakdown Voltage Walk-in Phenomenon and Optimization for the Trench-Gate p-Type VDMOS Under Single Avalanche Stress

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An anomalous breakdown voltage (BV) walk-in phenomenon of the trench-gate p-type vertical double-diffused metal–oxide–semiconductor (VDMOS) after single avalanche stress has been experimentally investigated. It is found that the BV of… Click to show full abstract

An anomalous breakdown voltage (BV) walk-in phenomenon of the trench-gate p-type vertical double-diffused metal–oxide–semiconductor (VDMOS) after single avalanche stress has been experimentally investigated. It is found that the BV of the VDMOS is decreased after the single avalanche stress, while other electrical parameters remain unchanged. T-CAD simulations and emission microscope (EMMI) analysis have been carried out. As a result, the shift of the breakdown point of the VDMOS, which results in the hot hole injection and trapping at the termination region, should be responsible for the BV degradation. A novel device structure with different trench depths in the termination region for the trench-gate p-type VDMOS is proposed to suppress the BV walk-in phenomenon.

Keywords: trench gate; gate type; avalanche stress; single avalanche; walk phenomenon

Journal Title: IEEE Transactions on Electron Devices
Year Published: 2020

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