The narrow design window in FinFET process has put forward very strict demands on the clamping voltage of input–output (I/O) protection devices in rail-based electrostatic discharge (ESD) protection networks. In… Click to show full abstract
The narrow design window in FinFET process has put forward very strict demands on the clamping voltage of input–output (I/O) protection devices in rail-based electrostatic discharge (ESD) protection networks. In this article, a novel all-directional diode-triggered silicon-controlled rectifier (AD-DTSCR) with superior voltage clamping ability is proposed. Unlike the widely adopted optimization work within one single finger only, the proposed AD-DTSCR realized a secondary optimization of ESD properties between multiple fingers during scaling first. Specifically, by constructing diagonal placement of electrodes and WELLs, orthogonally distributed SCR current paths can be acquired between multiple fingers. Experimental results indicate that compared to its prior art, the AD-DTSCR can achieve 93% improvement in effective ESD robustness and 64% improvement in figure of merit (FOM) (ESD robustness/capacitance), thus being superior for I/O ESD protection engineering in advanced FinFET processes.
               
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