The ac-side cascaded H-bridge converter with a two-level (2L) main bridge has previously been proposed as a fault-tolerant converter for high-voltage dc. This paper explores the benefits of replacing the… Click to show full abstract
The ac-side cascaded H-bridge converter with a two-level (2L) main bridge has previously been proposed as a fault-tolerant converter for high-voltage dc. This paper explores the benefits of replacing the 2L bridge with a neutral point clamped (NPC) three-level bridge for medium voltage dc applications and defines the optimum operating conditions for this case. By modifying the topology to include an NPC main bridge, the peak stack voltage during normal operation is decreased considerably, which results in a 58% reduction in the required number of submodules (SM), thereby significantly increasing efficiency. However, this sacrifices the fault ride-through capability as the stacks are no longer able to support the ac voltage and thus two new SM topologies are proposed. The proposed topologies function as single full-bridges with two capacitors in parallel during normal operation. Under fault conditions, the SMs divide into two series-connected full-bridges to enable dc fault ride-through. Reverse-blocking integrated gate-commutated thyristors or ultra-fast mechanical switches are used to bypass the insulated gate bipolar transistors that are unused in normal operation and therefore the topology maintains a high efficiency. Simulation results are shown, and the proposed topologies are compared with the more conventional designs in terms of efficiency, energy storage requirement, and device count.
               
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