LAUSR

In this article, we develop a novel approach to design power hardware-in-the-loop (PHIL) simulation interfaces that maximize simulation bandwidth and accuracy by leveraging a modern control framework that explicitly considers objectives on accuracy and can automatically synthesize an optimal controller that meets these objectives while stabilizing the closed-loop system. The method developed improves upon common approaches to PHIL interface design that typically involve multiple design steps for manual compensation and stabilization that can result in interfaces that are stable but have suboptimal bandwidth and accuracy. The approach developed is general and can be applied to most PHIL system configurations. The modeling framework allows for the inclusion of scaling factors and hardware-under-test current injection models that are common to practical PHIL simulations and have significant impacts on stability. We also present practical methods and metrics for verifying the absolute accuracy of PHIL simulation results without relying on relative comparisons to potentially inaccurate models or previous simulation results. We demonstrate the accuracy evaluation method and show the improved performance achievable when using the optimal PHIL interface design approach in an experimental case study involving a 100-kVA battery inverter.