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A Universal ZVS Circuit Design Method for a Family of Interleaved High Step-Up Converters With Least Device Requirement

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This article proposes a universal zero-voltage switching (ZVS) circuit design method for a family of interleaved dual boost diode-capacitor (IDBD) step-up converters with different voltage multiplier cell (VMC) structure and… Click to show full abstract

This article proposes a universal zero-voltage switching (ZVS) circuit design method for a family of interleaved dual boost diode-capacitor (IDBD) step-up converters with different voltage multiplier cell (VMC) structure and number. By utilizing one small inductor and two resonant capacitors, all the power devices in the hard-switching (HS) IDBD converters can achieve soft-switching. Besides, the increment of voltage and current stresses imposed on the semiconductor devices and passive components is minimized in comparison to the HS counterparts with the conventional SS design. Due to the voltage-clamped ability of the diode-capacitor network, the voltage stress of one switch in the constructed topologies is less than the output voltage and decreases further when the VMC number increases. Hence, the low on-state resistance switches can be used to further reduce the conduction loss. Consequently, the constructed ZVS topologies demonstrate improved efficiency with low cost and small volume. Furthermore, the high voltage gain, low-input current ripple, and low-voltage stress characteristics of the HS IDBD converters are also conserved. Finally, a 320 W prototype is built and tested to verify the theoretical analysis and efficiency improvement.

Keywords: voltage; zvs; zvs circuit; design method; circuit design

Journal Title: IEEE Transactions on Industrial Electronics
Year Published: 2021

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