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The Mathematical Model and Novel Final Test System for Wafer-Level Packaging

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To develop integrated circuit (IC) test of wafer-level packaging, the electromechanical model of microprobe testing process and the IC final test system of wafer-level packaging based on microprobe arrays are… Click to show full abstract

To develop integrated circuit (IC) test of wafer-level packaging, the electromechanical model of microprobe testing process and the IC final test system of wafer-level packaging based on microprobe arrays are first proposed. An electromechanical model of the process of microprobe testing is derived, which is based on the analysis of the collected real-time force and electrical data using designed force sensing system, voltage measuring circuit and loading system. It is found that the contact resistance is a quartic function with respect to the loading force, and the loading force has nonlinear hysteretic damping characteristics with respect to the displacement and speed of the microprobe. The real-time contact resistance is approximately an exponential function of the damping force. Finally, the effectiveness of the proposed electromechanical model on wafer-level packaging testing using our designed new microprobe arrays testing system is confirmed. It will provide models and methods for developing IC final test of wafer-level packaging.

Keywords: wafer level; level packaging; system; test

Journal Title: IEEE Transactions on Industrial Informatics
Year Published: 2017

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