To develop a lower cost on-chip characterization solution for postsilicon validation, this article proposed a “noise-shaping phase-switching” technique on a sigma–delta modulated digital-to-analog converter (DAC) to realize a low-noise, high-linearity… Click to show full abstract
To develop a lower cost on-chip characterization solution for postsilicon validation, this article proposed a “noise-shaping phase-switching” technique on a sigma–delta modulated digital-to-analog converter (DAC) to realize a low-noise, high-linearity sinusoidal-wave generator. The proposed technique combines the fifth-order cascade of resonators with distributed feedback (CRFB) type delta–sigma modulation (DSM) and the two-way time-interleaving phase-switching harmonic distortion (HD) cancellation technique without additional cost. The theoretical analysis is verified with MATLAB and further implemented using a low-cost arbitrary waveform generator (AWG) as the output DAC. Compared with a nonideal 12-b DAC, the proposed technique achieved at least 2-dB enhancement in spurious-free dynamic range (SFDR) (measurement) while maintaining an improvement of at least 18 dB in the medium dynamic range (DR) (simulation) over the entire signal bandwidth.
               
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