LAUSR

Innovative digitizers exploiting mixing, filtering, and processing (MFP) operations can grant ultrahigh bandwidth and sampling rate. Their operation combines analog processing stages with a digital signal processing stage, where massive operations are performed to obtain the digital representation of the input signal. In fact, the samples returned by the analog-to-digital converter (ADC) consist of a transformed, namely, mixed and filtered, version of the input, which shall be processed in the digital domain to reconstruct the input signal. The digital processing is also designed to attain streamline calibration, which provides both the removal of nonideal effects, such as mismatches between individual channels, and the improvement of the frequency response flatness. Calibration strategies represent an asset of manufacturers’ know-how since the performance of the digitizer largely depends on the effectiveness of the calibration process. Gain equalization and aliasing removal are performed in the digital domain by finite impulse response (FIR) filtering of the ADCs’ outputs. A general method for the identification of the calibration filters, and their translation into algorithms for MFP digitizers using two, four, or any number of channels, is proposed here. Functional- and circuit-level Cadence Virtuoso simulations in an STMicroelectronics Si–Ge heterojunction bipolar transistor (HBT) process are also carried out to evaluate the performance of the proposed method through a comparison between the digital representations of the signals obtained with and without calibration.