LAUSR

This article presents two broadband frequency multiplier chains (FMCs) fabricated with a standard 130-nm SiGe BiCMOS process. In both solutions, a broadband push-push frequency doubler (x2) operating at 220–360 GHz was employed. In order to properly drive such a doubler, with sufficient input power and bandwidth, two different power amplifiers (PAs) have been adopted: the former is based on a cascode configuration and the latter is based on a stacked topology. In addition, a D-band frequency quadrupler (x4) has been integrated before the PAs and doubler, to complete the design of frequency eighth tupler (x8) chains. The first FMC with the cascode PA achieves peak output power of 2.3 dBm, with maximum conversion gain (GC) and bandwidth of 15 dB and 127 GHz, respectively. The second FMC with the stacked PA delivers a saturated output power of 2.5 dBm, with a maximum GC and a bandwidth of 12 dB and 72 GHz, respectively. The two FMCs consume maximum dc power of 0.537 and 0.542 W. The complete design procedure of the FMCs is presented in this article. To the best of our knowledge, the reported bandwidth is state-of-the-art and widest among SiGe based FMCs.