LAUSR

Under radiation environment, conventional SRAMs suffer from high soft-error rate. To address this challenge, several radiation-hardened static-random access-memory (SRAM) cells such as twelve-transistor (12T) Dice and ten-transistor (10T) Quatro have been developed. Quatro is more promising since this cell delivers robust operation while incurring moderate area overhead. However, our study shows that Quatro experiences large number of write failures under parametric variations of scaled technologies, impeding the application of this SRAM cell. In this paper, we present a 12T SRAM cell named as we-Quatro. In spite of using more transistors, the proposed SRAM cell occupies essentially the same area as Quatro. Our extensive simulations show that the proposed cell provides good writability and comparable soft-error resilience to Quatro under parametric variations of 28-nm fully depleted SOI technology, validating the efficacy of our proposed we-Quatro.