This paper intends to briefly overview the new technological updates on the large hadron collider (LHC) A Toroidal LHC ApparatuS (ATLAS) acquisition system of the Pixel Detector. The herein presented… Click to show full abstract
This paper intends to briefly overview the new technological updates on the large hadron collider (LHC) A Toroidal LHC ApparatuS (ATLAS) acquisition system of the Pixel Detector. The herein presented Read-Out Driver (ROD) is a Versa Module Europa (VME) board devoted to data processing, configuration, and control. It is designed to provide data formatting, front-end specific error handling, and calibration. This board was initially designed to interface the data sensed by the insertable B-layer (IBL) with the ATLAS Trigger and Data AcQuisition system (TDAQ). IBL is the innermost sensing layer of the ATLAS Pixel Detector, added during the 2013/2014 LHC long shutdown, to withstand higher luminosity and feature higher throughput performance. To read out the new layer of pixels with a smaller pixel size with respect to the other outer layers, a front-end ASIC (FE-I4) was designed. Because of its optimal performance, it was decided to adopt the IBL ROD also for pixel Layers 1 and 2. Among the several advantages, one of the most important is the reduction of link occupancy due to the increased bandwidth (80 Mb/s, two times the previous one); 40 ROD boards, fabricated and tested in 2015, were installed in the Layer 2 acquisition system featuring outstanding performance, while 45 RODs for Layer 1 are still under test and will be installed by the end of 2016.
               
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