This paper presents a study of the noise behavior of MOSFET devices belonging to a 110-nm CMOS technology in view of applications to the design of low-noise, low-power analog circuits… Click to show full abstract
This paper presents a study of the noise behavior of MOSFET devices belonging to a 110-nm CMOS technology in view of applications to the design of low-noise, low-power analog circuits in X-ray detection at free electron lasers (FELs) and the next generation of synchrotrons. The goal of this paper is to provide a valuable and cost-effective option, with respect to more scaled and expensive technology nodes, to designers of the detection systems of FELs and next-generation synchrotron sources. The white component of the noise voltage spectrum and the 1/ $f$ noise contribution is experimentally characterized by noise measurements in a wide frequency range. Data extracted from the characterization have been studied as a function of the bias condition and the gate dimensions (length and width). A comparison of the main parameters with less and more scaled CMOS generations is also provided.
               
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