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Tibetan-Plateau-Based Real-Time Testing and Simulations of Single-Bit and Multiple-Cell Upsets in QDRII+ SRAM Devices

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Real-time soft error rate of 65-nm QDRII+ static random access memory was measured on the Tibetan-plateau with an altitude of 4300 m. Error types including single-bit upset (SBU), multiple-cell upset… Click to show full abstract

Real-time soft error rate of 65-nm QDRII+ static random access memory was measured on the Tibetan-plateau with an altitude of 4300 m. Error types including single-bit upset (SBU), multiple-cell upset (MCU), and burst errors were observed. The MCU ratio is 23%, with a maximum size of nine cells. Majority of the MCU events are vertically oriented along the well stripes. Monte Carlo simulations were further performed to study the characteristics of the neutron-induced secondary ions. Diverse secondary ion species, from the proton to Re, were found, which were significantly affected by the presence or absence of the tungsten layer. The impact of neutron energy on the linear energy transfer (LET), range, and deposited charge of secondary ions in the sensitive volume was revealed.

Keywords: real time; multiple cell; tibetan plateau; single bit

Journal Title: IEEE Transactions on Nuclear Science
Year Published: 2019

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