LAUSR

In order to improve the dynamic responses of multimode controlled primary-side regulation flyback converter, a novel digital control method is proposed in this paper. A new DAC sampling method, which can capture the output voltage during dynamic transition, is introduced. Based on it, a dynamic module which can monitor the variation of the output voltage to improve the dynamic performance is proposed. In a 5-V/1-A primary-side regulation flyback converter, the maximum undershoot voltage and overshoot voltage of the proposed control scheme in this study are 0.472 and 0.192 V, respectively. They are much lower compared to 1.296 and 0.584 V in the traditional control scheme. The maximum undershoot and overshoot recovery times are reduced from 10.86 to 1.29 ms and 126.3 to 53.68 ms, respectively. The proposed control scheme was then verified by a FPGA controlled prototype.