LAUSR

SiC mosfet has low on-state resistance and can work on high switching frequency, high voltage, and some other tough conditions with less temperature drift, which could provide the significant improvement of power density in power converters. However, for the bridge circuit in an actual converter, high dv/dt during fast switching transient of one mosfet will amplify the negative influence of parasitic components and produce the significant negative voltage spikes on the complementary mosfet, which will threaten its safe operation. This paper proposes a new gate driver circuit for SiC mosfet to attenuate the negative voltage spikes in a bridge circuit. The proposed gate driver adopts a simple voltage dividing circuit to generate a negative gate-source voltage as traditional and a passive triggered transistor with a series-connected capacitor to suppress the negative voltage spikes, which could satisfy the stringent requirements of fast switching SiC mosfets under the high dc voltage condition with low cost and less complexity. An analysis is presented in this paper based on the simulation and experimental results with the performance comparison evaluated.