Due to ever-increasing demand for high-level integration, low power dissipation and high fidelity, Class D amplifier ICs (CDA ICs) need to feature very high power supply rejection ratio (PSRR), very… Click to show full abstract
Due to ever-increasing demand for high-level integration, low power dissipation and high fidelity, Class D amplifier ICs (CDA ICs) need to feature very high power supply rejection ratio (PSRR), very low total harmonic distortion plus noise (THD + N), low output noise, high power-efficiency, low electromagnetic interference (EMI), and fixed switching frequency. We propose a fully integrated filterless CDA IC embodying a novel loop-filter that simultaneously features an ultrahigh loop gain of >200 dB and high carrier attenuation of −10 dB. Due to the ultrahigh loop gain and high carrier attenuation, the linearity and PSRR of the CDA IC is significantly improved. The proposed CDA IC further embodies a novel deadtime circuit that can eliminate the false switching in the Class D output stage, hence reducing the EMI and further improving the linearity of the CDA IC. The proposed CDA IC simultaneously features an ultrahigh PSRR (>100 dB from 100 Hz to 1 kHz), very low THD + N (0.005%), very low output noise (16 μV), and low EMI (10 dB below the EN55022 Class B standard)—yet with fixed switching frequency (400 kHz). When benchmarked against state-of-the-art designs, our CDA IC features the highest PSRR, allowing hookup directly to the battery and features the lowest output noise.
               
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