This letter proposes a trigger-free dual-ramp controller for a three-level buck-boost converter. This design improves dynamic responses by eliminating the delay due to the clock edges in traditional pulse width… Click to show full abstract
This letter proposes a trigger-free dual-ramp controller for a three-level buck-boost converter. This design improves dynamic responses by eliminating the delay due to the clock edges in traditional pulse width modulation controllers. It can fasten the inductor current slew rate in transient responses. The proposed controller also ensures seamless mode transition and reduces switching losses when the voltage conversion ratio approaches 1, as it imposes no restriction on switching frequency. This letter also introduces the detailed implementations of the dual-ramp generator. The chip was fabricated in a 180 nm CMOS process. This work achieves a peak efficiency of 98.4%. It supports a lithium-ion battery input voltage range of 2.7–4.2 V and an output voltage range of 0.5–5.5 V. Measurement results demonstrate a dynamic voltage scaling rate of 0.8 μs/V and a less than 3 μs recovery time for a 500 mA load current step transition in less than 200 ns.
               
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