This paper deals with stabilization of an ideal transformer model (ITM) circuit, used as an interfacing algorithm for hardware-in-the-loop simulations. The ITM allows for the distribution of simulation model computations… Click to show full abstract
This paper deals with stabilization of an ideal transformer model (ITM) circuit, used as an interfacing algorithm for hardware-in-the-loop simulations. The ITM allows for the distribution of simulation model computations over multiple processors or can be used in power hardware-in-the-loop simulations. When specific impedance conditions of the partitioned circuit are not met, this interfacing algorithm becomes unstable. This paper first presents a new theoretical approach for representing the ITM interfacing algorithm that is based on delay differential equations. With a stability analysis of the obtained time-delay system, a stabilization method is proposed, which increases the stability boundaries of the ITM algorithm. Simulation examples, including the scenario of a two-level inverter system, are provided.
               
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