LAUSR

The positive-feedback gain-enhancement operational transconductance amplifier (OTA) design is a promising architecture to scale into deep submicron CMOS. Ever smaller CMOS process nodes require analog circuit designs that can overcome the area–power-matching relation. We introduce a Nauta OTA with a split architecture consisting of fixed width and digitally programmable variable width transconductors utilizing the minimum grid-spacing of the CMOS process enabling an active mismatch cancelation technique. A variation-aware statistical design practice is introduced to analyze the sizing of transconductors, computing code-word solutions for statistically likely solutions, and estimating average maximum dc gain over the entire code-space of many simulated OTAs. Prototypes of a 8-bit differential OTA in 180-nm CMOS designed using the Nauta structure fixed width and digitally programmable variable width architecture achieves an average maximum dc gain of 60 dB, simulated unity gain frequency of 4.6 GHz, and a figure-of-merit of 1 GHz/mW.