This article describes a wideband low-noise frequency synthesizer implemented in 0.13- $\mu \text{m}$ SiGe BiCMOS process for 5G millimeter-wave applications. To extend the frequency range while reducing the phase noise,… Click to show full abstract
This article describes a wideband low-noise frequency synthesizer implemented in 0.13-$\mu \text{m}$ SiGe BiCMOS process for 5G millimeter-wave applications. To extend the frequency range while reducing the phase noise, a fundamental voltage-controlled oscillator (VCO) array including four Colpitts VCO cores with switchable bias circuits is adopted in the proposed frequency synthesizer. A ring-oscillator-based injection locked frequency divider is utilized as the wideband divide-by-2 prescaler, and its bandwidth is optimized based on a new injection-locked behavior model. This fabricated frequency synthesizer can be locked in a range from 23 to 36.8 GHz (46.2%) by a 100-MHz step. It achieves a phase noise of −94.7 dBc/Hz at the 1-MHz offset and an output power of −3.5 dBm measured at 36.8 GHz. The chip consumes 360.6 mW from 3.3 and 1.8 V supplies and has an area of $2.7\times3.1$ mm2.
